Open Source Summit + ELC Europe 2018

(Pronounced “risk-five”), an open instruction set architecture (ISA) was originally designed at UC Berkeley to support computer architecture research and education, is an industry standard open ISA under the governance of the RISC-V Foundation. The RISC-V ISA is finding its way into applications ranging from IoT to high-end servers and supercomputing. With the advent of RISC-V, which distills over 30 years of RISC processor research into an extensible instruction set that can be fully customized, hardware implementers are now able to build fully open-source based CPUs.  This talk will provide an introduction to the RISC-V ISA and an overview of the RISC-V Foundation.